Method for producing a silicate layer in an integrated circuit

ABSTRACT

A silicate layer, which is especially used as an intermediate oxide insulation layer in an integrated circuit for levelling topographic irregularities, is produced by the following method steps: photo-induced polymerization of polysiloxane by means of vapor-phase reaction taking as a basis an SiO-containing or an SiC-containing organic compound together with an O 2  -containing and/or an N 2  O-containing gas at a first temperature and under a first pressure in a reaction chamber; condensing polysiloxane to produce a polysiloxane layer on a structure, in particular on the circuit structures of the integrated circuit, in a condensation chamber separated from said reaction chamber at a second temperature, which is lower than said first temperature and which is at least high enough to prevent the SiO- or SiC-containing organic compound from condensing under a predetermined second pressure in the condensation chamber, but which is higher than the temperature at which polysiloxane will condense under said second pressure; and converting the polysiloxane layer into the silicate layer.

The present invention relates to a method of producing a silicate layerin an integrated circuit.

Silicate layers provided within integrated circuits are normally used asintermediate oxide insulation layers for electrically insulating thepolysilicon plane and the diffusion areas located below the intermediateoxide insulation layer from the conductor tracks which are arrangedabove the intermediate oxide insulation layer and which may consist,e.g., of aluminum. Furthermore, the interradiate oxide insulation layeris used for making uniform or for rounding off topographicirregularities of the circuit structures formed on the substrate beforethe polysilicon structure is formed. The vertical steps of the circuitstructures must be rounded off and levelled as much as possible by theintermediate oxide insulation layer, since otherwise shadowing effectsmay occur when the aluminum conductor tracks are produced by means of asubsequent aluminum sputtering process, and since, in addition,excessively high steps in the substrate may result in overhangs and intearing of the aluminum conductor tracks. When the integration level ofthe integrated circuit increases, these problems become more and morecritical, since, due to the fact that the lateral dimensions decrease asthe integration level increases, the height-width ratio increases whilethe layer thickness of the topographic steps remains unchanged.

For the consequently necessary levelling of structured surfaces ofintegrated circuits, two methods are primarily used at present:

According to the first known method, a polysiloxane layer is applied bymeans of a spin-on process to the topologically uneven circuitstructures formed on a substrate. The polysiloxane layers applied inthis way are also referred to as spin-on glass (SOG). After having beenapplied by the spin-on process, the polysiloxane layer is converted intoa silicate layer or SiO₂ layer in a subsequent tempering process. In thecase of this method, the chemical composition of the polysiloxane layercannot be varied and the flow behavior and the viscosity of thepolysiloxane layer as well as the layer thickness thereof can only beadjusted within close limits. When polysiloxane layers are applied bymeans of the spin-on process, it is technologically very difficult toproduce thin layers and layers having a homogeneous thickness throughoutlarge wafer diameters. Furthermore, it is impossible to adapt thechemical composition and, consequently, the viscosity as well as theflow properties of commercially available polysiloxanes to therequirements of a special topography of the integrated circuit, as canbe necessary, for example, for filling a trench, since the adaptation ofthe composition and of the flow properties of the polysiloxanes can onlybe carried out through the manufacture thereof.

In the second known method, boron phosphorous silicate glass layers areproduced in a chemical vapor deposition process (CVD) as intermediateinsulation layers. This vapor deposition process uses as starting gasespreferably silane compounds or organic siloxane compounds together withdoping gases, such as B₂ H₆ and PH₃, respectively, as well as oxygen(O₂). These boron phosphorus silicate glass layers can be deposited bymeans of a purely thermal reaction at atmospheric pressure or in the lowpressure range as well as in plasma. The boron phosphorus silicate glasslayers have high flow temperatures and, consequently, they result in ahigh temperature budget in the overall production process. Furthermore,in order to prevent diffusion of boron or of phosphorus, additionaldiffusion-retarding cover layers, such as silicon nitride layers, haveto be used, and this burdens the overall production process. Moreover,due to their complex chemical structure and composition boron phosphorussilicate glass layers are difficult to handle when subsequent processsteps, such as etching of contact holes, are carried out.

The technical publication "Solid State Technology, April 1988, pages 119to 122", discloses a PE-TEOS (plasma enhanced -tetraethyl orthosilicate)process of producing a dielectric intermediate layer. In the case ofthis process SiO₂ is deposited. The production of the species iseffected by plasma ignition in the gas chamber. The reaction of thespecies on the wafer surface takes place at temperatures above 300° C.This will result in an adsorption-controlled reaction on the basis ofwhich the wafer surface will be provided with a conform cover.

GB 2 048 230 discloses a method for photochemical vapor deposition ofoxides. one variant of the known method uses as starting materials anoxygen donor as well as TEOS. As far as the reference discloses detailswith regard to the reaction sequence, the reaction sequence of the knownmethod seems to be a diffusion-limited deposition.

DE-A-34 16 470 shows a so-called dry process, and this refers to anetching process used for uniformly etching semiconductor structures orto chemical vapor deposition (CVD) of amorphous silicon. In the case ofa deposition of amorphous silicon, an apparatus with separate chambersis provided, a discharge shower means being disposed between thechambers so as to produce a pressure difference, and polymerization iscaused by means of light excitation by an external light source. Theprocess according to this publication neither aims at optimizing thelevelling of topographic irregularities by means of an intermediateoxide insulation layer, nor does it deal with a reaction sequence whichis completely finished within one spatial region, nor are thetemperature and pressure conditions in this process selected so thatcondensation of the products formed will occur in the lower chamber ofthe apparatus.

EP-A-28 33 11 discloses a thin-film production process which, for thepurpose of filling trenches, a deposition of the starting material onthe substrate in the liquid phase takes place due to an adjustment ofthe substrate temperature to a sufficiently low value. This publicationteaches the person skilled in the art not to use the TEOS processassessed in the introduction to the specification of this publication,since this publication avers that the process is unsuitable forlevelling topographic irregularities, and it teaches to directly depositinstead a starting substance as a liquid film, the contributions of thevapor phase reaction being of secondary importance in the processaccording to this publication.

SUMMARY OF THE INVENTION

It is the principal object of the present invention to provide a methodfor producing silicate layers, in such a way that a silicate layerformed will level topographic irregularities to a large extent, and willbe adapted to be produced with a uniform, determinable layer thicknessthroughout large surfaces, and in such a way that the flow behavior ofthe deposited polysiloxane layer can be adjusted freely.

BRIEF DESCRIPTION OF THE DRAWINGS

The foregoing and other objects will become more readily apparent byreferring to the following detailed description and the appendeddrawings, in which:

FIG. 1 is a schematic diagram of an apparatus for producing a silicatelayer according to the present invention, the apparatus being suitablefor carrying out the method according to the present invention.

FIG. 2 is a sectional view through an integrated circuit with a flattrench structure after application of a silicate layer by means of themethod of the present invention.

DETAILED DESCRIPTION OF THE INVENTION

The apparatus shown in FIG. 1, which is used for producing a silicatelayer as an intermediate oxide insulation layer in an integrated circuitfor levelling topographic irregularities of circuit structures formed ona substrate of the integrated circuit, is identified by reference symbolV in its entirety, and comprises a reaction chamber 1 as well as acondensation chamber 2. The reaction chamber 1 is adapted to be heatedby means of a heating device in the form of a heating coil 3 and it isadapted to be irradiated by a light source for ultraviolet light, whichis separated from the reaction chamber 1 by a glass plate 5, preferablyan optical quality fused quartz, such as sold under the TrademarkSUPRASIL, by Heraeus Amersil, Inc., of Sayresville, New Jersey. Thecondensation chamber 2 has provided therein an electrically heatablereception device 6 for a semiconductor wafer to be coated, thesemiconductor wafer being a silicon wafer 7 in the case of the presentexample.

Between the reaction chamber 1 and the condensation chamber 2 adischarge shower means 8 is located, the flow-through openings 9 of thedischarge shower means 8 having a cross-section of such a nature thatthe pressure within the condensation chamber 2 is less than 100 mbarlower than the pressure within the reaction chamber 1.

The condensation chamber 2 is connected, via a control valve 10, to apump 11 with the aid of which the condensation chamber can be evacuatedto a pressure level which is adapted to be adjusted by means of thecontrol valve 10.

A gas containing 02 can be supplied to the reaction chamber 1 via afirst flow control valve 12. A gas containing N₂ O can be supplied tothe reaction chamber 1 via a second flow control valve 13. AnSiO-containing compound, which is preferably tetraethyl orthosilicate,can be supplied to the reaction chamber via a third flow control valve14. A vaporizer 15 for vaporizing the tetraethyl orthosilicate, which issupplied in the liquid state, is located between the flow control valves12, 13, 14 and the reaction chamber 1.

The flow control valves 12, 13, 14 are adjusted such that the mixingratio of the gases supplied, e.g. tetraethyl orthosilicate : O₂ : N₂ O,corresponds to the ratio 3 : 10 : 10 with the proviso that normalconditions (1 bar, 300 K) exist.

By adequately adjusting the heating power of the heating coil 3, thereaction temperature is adjusted to a temperature of from 120° to 150°in a pressure range of from preferably 100 to 800 mbar reactionpressure.

By adequately adjusting the heating power of the reception device 6, thecondensation temperature, which corresponds to the temperature of thesilicon wafer 7, is adjusted to a range between 30° and 90° C.

Subsequently, the polysiloxane layer is converted into a silicate layereither in a purely thermal tempering process or in a photo-aidedtempering process. Following this, the silicate layer thus produced canhave applied thereto a structure of aluminum conductor tracks in amanner known per se.

In the method described above, tetraethyl orthosilicate is used as aprecursor. Instead of using SiO-containing organic compounds as aprecursor, it is also possible to use SiC-containing organic compounds.

The molecular formulae of the polysiloxanes for the two above-mentionedcases are as follows: ##STR1## Formula (1) is applicable to cases inwhich TEOS Si(OC₂ H₅)₄ is used as a precursor.

Formula (2) is applicable to cases in which precursors containing.tbd.Si--C.tbd. bonds, such as hexamethyldisiloxane ortetramethylcyclotetrasiloxane, are used.

The following substances can be used as SiO-containing or SiC-containingorganic compounds and as precursors, respectively:

I. alkyl silane, e.g. tetramethylsilane Si(CH₃)₄ ;

II. alkoxy silane, e.g. tetraethoxysilane (TEOS) Si (OC₂ H₅)₄ ;

III. low-molecular siloxanes, e.g. hexamethyldisiloxane Si₂ O(CH₃)₆ ;and

IV. low-molecular cyclosiloxanes, e.g. octamethylcyclotetrasiloxane Si₄O₄ (CH₃)₈.

For the invented method, it is of decisive importance that, on the basisof a suitable choice of the temperature and pressure conditions, thepolysiloxane will condense in the condensation chamber, whereascondensation of the precursor in the condensation chamber on the siliconwafer 7 is to be prevented. Hence, the temperature of the silicon wafer7 is chosen such that the precursor will just be prevented fromcondensing under the given pressure within the condensation chamber, thetemperature of the silicon wafer being, however, limited to such a valuethat condensation of the polysiloxane will be possible under the secondpressure within the condensation chamber.

The first temperature within the reaction chamber depends on theprecursor chosen and must be determined by experiments depending on therespective precursor which has been chosen. For the preferred precursortetraethyl orthosilicate the preferred reaction temperatures lie between120° and 150° C.

In contrast to the adsorption-controlled reaction which is normallyemployed in the prior art, the condensation of the polysiloxane on thesurface of the silicon wafer will have the effect that structures havinga negative radius of curvature will be filled preferably. This willresult in an increased degree of planarization of the surface.

The invented method permits a production of the polysiloxane immediatelyprior to its use, and, via the choice of the precursor, it is possibleto adapt the properties of the polysiloxane to the respective case ofuse. The production of polysiloxane can be optimized by determining theconditions of the vapor-phase reaction in the separate reaction chamber,without there being any necessity of taking into account the necessaryskeleton conditions for the condensation process in the condensationchamber. After the condensation of polysiloxane on the semiconductorsurrace in a liquid phase, no further reaction will take place on thesurface. This type of sequence of process steps is in contrast with thesequence of process steps in the case of the known processes, which wereexplained at the beginning.

FIG. 2 shows a sectional view through a silicon wafer 7, which isprovided with a flat trench structure and which has been coated with asilicate layer by means of the method according to the presentinvention, the topographic steps being levelled to a large extent by thesilicate layer. In the invented method, the silicate layer is used forlevelling topographic irregularities of circuit structures formed on asubstrate of an integrated circuit. The silicate layers produced by themethod according to the present invention are, however, nor limited tothis case of use, but they can be employed quite generally as adielectric for any kind of use.

We claim:
 1. A method of producing a silicate layer as an intermediateoxide insulation layer in an integrated circuit for levelling topogaphicirregularities of circuit structures formed on a substrate of saidintegrated circuit, said method comprising the followingsteps:photo-induced polymerization of polysiloxane by means ofvapor-phase reaction taking as a basis an SiO-containing or anSiC-containing organic compound together with an O₂ -atmosphere and/oran N₂ O-atmosphere at a first temperature and under a first pressure ina reaction chamber; condensing polysiloxane to produce a polysiloxanelayer on the circuit structures of the integrated circuit formed on thesubstrate, in a condensation chamber separated from said reactionchamber; said substrate being adjusted to a second temperature, which islower than said first temperature and which is so selected that theSiO-containing or SiC-containing organic compound will no longercondense under a second pressure in the condensation chamber, but thatcondensation of the polysiloxane on the circuit structures of theintegrated circuit formed on said substrate will take place; andtempering said polysiloxane layer into the silicate layer whereby it isconverted into the silicate layer.
 2. A method according to claim 1characterized in that the first temperature lies in the range between120° C. and 150° C.
 3. A method according to claim 1, characterized inthat the second temperature lies in the range between 30° C and 90° C.4. A method according to claim 1, characterized in that the firstpressure lies between 100 mbar and 800 mbar, and that the second
 5. Amethod according to claim 1, characterized in that the method step ofphoto-induced polymerization of polysiloxane comprises the step ofsupplying the starting materials via separate flow control means (12 to14) as well as the step of vaporizing the SiO-containing organiccompound.
 6. A method according to claim 1, characterized in that theSiO-containing organic compound is tetraethyl orthosilicate (Si(OC₂H₅)₄).
 7. A method according to claim 1, characterized in that thepolysiloxane layer is converted into the silicate layer in a purelythermal tempering process.
 8. A method according to claim 1,characterized in that the polysiloxane layer is converted into thesilicate layer in a photo-aided tempering process.